We are performing detailed work on delivering RF and microwave energy efficiently and cleanly to densely integrated systems. We have a very capable set of signal integrity / power integrity (SI / PI) simulation and measurement tools (up to 110GHz & > 28Gbps…see equipment page). With this set of tools, we can simulate the performance of advanced interconnect and integration structures, build them, measure/characterize them and develop models. We use Ansoft (HFSS/Q3D/SIWave), ADS (Momentum/EMPro), Sonnet, etc. to help us to simulate and model these structures.
As an example, we have characterized the power integrity of low-temperature co-fired ceramic (LTCC) power distribution network (PDN) structures. We have found good agreement between the simulated and measured complex impedance up to 3GHz for our PDN structures. (Note there are vias shunting to ground in this structure that appears to be a simple microstrip geometry.)
We also characterize the signal integrity of a host of interconnect and integration structures, ranging from thin-film materials, to LTCC, to advanced bump architectures (chip-to-chip / chip-to-board / chip-to-package). Here we show our bit error rate test (BERT) set-up along with our Cascade Summit RF probe station, as well as a representative >25Gbps eye diagram (note every 4th bit is tested so the bit rate through the structure is 4x that shown) and frequency-domain performance of the differential stripline thin-film structure shown below.
Last modified: June 7, 2013